IEMENTech 2018

4th and 5th May, 2018

IEMENTech 2018

4th - 5th May, 2018

International Conference

Venue: IEM Gurukul, Kolkata

International Conference

Venue: IEM Gurukul Campus, Kolkata

Electronics, Material Engineering
&
Nano-Technology

Electronics, Materials Engineering
&
Nano-Technology

Electronics, Material Engineering
&
Nano-Technology

Full Paper Submission
5th April, 2018

Acceptance Notification
18th April, 2018

Full Paper Submission : 31th March, 2018

Acceptance Notification: 12th April, 2018

Camera Ready Paper Submission
Last Date: 21th April, 2018

Registration Deadline
25th April, 2018

Camera Ready Paper Submission
Last Date: 15th April, 2017

Registration Deadline
15th April, 2017

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 KEYNOTE SPEAKERS


Masahiro Fujita 

Dr. Masahiro Fujita is the Professor in the Department of Electronic Engineering in VLSI Design and Education Center (VDEC) of University of Tokyo since March 2000. Dr. Fujita joined University of Tokyo in 2000. He served as Technical Advisor of Vennsa Technologies, Inc. Dr. Fujita has been Technical advisor at Real Intent, Inc. since January 2010. He served as Director of CAD in Fujitsu Laboratories of America, where he served for 15 years. From 1993 to 2000, he was assigned to Fujitsu's US research office and directed the CAD research group. Dr. Fujita has been a Member of Technical Advisory Board of Calypto Design Systems, K.K. since February 2005. He serves as a Member of the Advisory Board at Real Intent, Inc., and NextOp Software, Inc. He serves as Member of Technical Advisory Board of Calypto Design Systems, Inc. He serves as a Member of Technical Advisory Board of Atrenta Inc. Dr. Fujita serves as a Member of the Technical Advisory Board at Averant, Inc. He served as Member of Technical Advisory Board of Zenasis Technologies. He has co-authored 2 books, and has over 150 publications. He has participated and chaired many prestigious conferences in CAD and VLSI designs. He has extensive high-level contacts in Japanese industry and academia. He has written over 100 technical papers on all aspects of logic design CAD. Dr. Fujita has received several awards from Japanese major scientific societies on his works in formal verification and logic synthesis. His doctor degree thesis was written in early 1980's and on model checking. Since then, he has been involved in many research projects on various aspects of formal verification. He has done innovative work in the areas of digital design verification at higher level design stages, hardware/software co-design and also digital/analog co-design, synthesis, and testing. Dr. Fujita received his Ph.D. degree in Information Engineering from the University of Tokyo in 1985.


Subhash Bhalla 

Professor Subhash Bhalla is the Professor of the department of Computer Software at the University of Aizu . Formerly he was the faculty of Jawaharlal Nehru University (JNU), New Delhi in 1986, at the School of Computer and Systems Sciences. He was a Visiting Scientist at Sloan School of Management, Massachusetts Institute of Technology (MIT), Cambridge, Massachusetts, USA (1987-88). He is a member of the Computer Society of IEEE and SIGMOD of ACM. He has also toured and lectured at many industries for conducting feasibility studies and for adoption of modern techniques. He has received several grants for research projects. Dr. Bhalla currently participates in the Intelligent Dictionary System Project. He is exploring database designs to support models for Information Interchange through the World wide Web. He is working with a study team on creating user interfaces for web users and transaction management system for mobile computing. He is studying transaction management and algorithmic designs for Distributed Real-Time Systems. He is also pursuing performance evaluation and modeling of distributed algorithms.